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Simulation of Semiconductor Processes and Devices 2004 Book

Simulation of Semiconductor Processes and Devices 2004
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Simulation of Semiconductor Processes and Devices 2004, This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004. The conference program included 7 invited ple, Simulation of Semiconductor Processes and Devices 2004
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  • Simulation of Semiconductor Processes and Devices 2004
  • Written by author Gerhard Wachutka
  • Published by Springer-Verlag New York, LLC, 4/30/2013
  • This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004. The conference program included 7 invited ple
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Advanced transport models for sub-micrometer devices 1
NEMO-1D : the first NGF-based TCAD tool 9
The density-gradient correction as a disguised pilot wave of de Broglie 13
Full band and approximated solutions of the Schrodinger equation in silicon inversion layers 17
A hybrid 3D quantum mechanical simulation of FinFETs and nanowire devices 21
On the calculation of quasi-bound states and their impact on direct tunneling in CMOS devices 25
Quantum mechanical simulation in DG MOSFETs based on a tight binding Green's function formalism 29
Modeling B uphill diffusion in the presence of Ge 33
Ab-initio calculations to predict stress effects on boron solubility in silicon 37
Boron diffusion in strained and strain-relaxed SiGe 41
Modeling dopant diffusion in SiGe and SiGeC layers 45
Continuum modeling of indium to predict SSR profiles 49
Theoretical analysis of stress and surface orientation effects on inversion carrier mobility 53
CMOS circuit performance enhancement by surface orientation optimization 57
Modeling of stress induced layout effect on electrical characteristics of advanced MOSFETs 61
Hole mobility enhancement modeling and scaling study for high performance strained Ge buried channel PMOSFETs 65
Three-dimensional characterization and modelling of stress distribution in high-density DRAM memory cells 69
Strain optimization to reduce gate leakage current in MOS transistors with silicon oxynitride gate dielectrics by use of first-principles calculations 73
Simulation study of simple CMOS-compatible Thin-SOI vertical bipolar transistors on thin BOX with an inversion collector 77
Current collapse associated with surface states in GaN-based HEMT's. Theoretical/experimental investigations 81
Implications of gate misalignment for ultra-narrow multi-gate devices 85
Source-side injection modeling by means of the spherical-harmonics expansion of the BTE 89
Investigation of a novel tunneling transistor by MEDICI simulation 93
Optimization of BAW resonator performance using combined simulation techniques 97
Simulation of GaN-based light-emitting devices 101
On the validity of the relaxation time approximation for macroscopic transport models 109
A local mobility model for ultra-thin DGSOI nMOSFETs 113
On the relationship between carrier mobility and velocity in sub-50 nm MOSFETs via calibrated Monte Carlo simulation 117
A method for determining the screening length of the coulombic scattering in non-degenerate and degenerate semiconductors 121
3D simulation of process effects limiting FinFET performance and scalability 125
Full three-dimensional analysis of a non-volatile memory cell 129
Three-dimensional simulation of orientation-dependent wet chemical etching 133
Modeling CVD effects in atomic layer deposition on the feature scale 137
Defect and carrier dynamics in nanotubes under electronic excitations : time-dependent density functional approaches 141
Three-dimensional analysis of Schottky barrier carbon nanotube field effect transistors 149
Numerical performance analysis of carbon nanotube (CNT) embedded MOSFETs 153
Parameter extraction and validation of an electronic and optical model for organic light-emitting devices 157
Adaptive surface triangulations for 3D process simulation 161
Anisotropic laplace refinement for three-dimensional oxidation simulation 165
Monte Carlo simulation of ion implantation in silicon-germanium alloys 169
Comprehensive understanding of carrier mobility in MOSFETs with oxynitrides and ultrathin gate oxides 173
Physics and modeling of radiation effects in advanced CMOS technology nodes 181
Very high performance, sub-20 nm, strained Si and Si[subscript x]Ge[subscript 1-x], hetero-structure, center channel (CC) NMOS and PMOS DGFETs 191
Scalability of FinFETs and unstrained-Si/strained-Si FDSOI-MOSFETs 195
Device performance in conventional and strained Si n-MOSFETs with high-[Kappa] gate stacks 199
Understanding the role of strain in Si-Ge devices 203
Electro-thermal simulations of strained-Si MOSFETs under ESD conditions 207
Simulation of the cross-coupling among snap back devices under transient high current stress 211
Simulation of the failure mechanism of power DMOS transistors under avalanche stress 215
An accurate and comprehensive soft error simulator NISES II 219
Impact of scattering on random dopant induced current fluctuations in decanano MOSFETs 223
Analysis of random doping and oxide thickness induced fluctuations in nanoscale semiconductor devices through poisson-Schrodinger computations 227
Stable simulation of impurity fluctuation for contact resistance and Schottky diodes 231
Impact of the floating body effect on noise in SOI devices investigated by hydrodynamic simulation 235
Examination of spatial frequency dependence of line edge roughness on MOS device characteristics 239
Simulation of lithography-caused gate length and interconnect linewidth variational impact on circuit performance in nanoscale semiconductor manufacturing 243
Optimization of recessed and elevated silicide source/drain contact structure using physical compact resistance modeling and simulation in ultra-thin body SOI MOSFETs 247
A new backscattering model for nano-MOSFET compact modeling 251
Fully-depleted SOI-MOSFET model for circuit simulation and its application to 1/f noise analysis 255
Modeling of carrier transport dynamics at GHz-frequencies for RF circuit-simulation
SPICE-compatible macro model for split-gate compact NVM cell with various gap sizes 263
SET accurate compact model for SET-MOSFET hybrid circuit simulation 267
2D quantum mechanical (QM) charge model and its application to ballistic transport of sub-50 nm bulk silicon MOSFETs 271
Effective bohm quantum potential for device simulators based on drift-diffusion and energy transport 275
Single ion and multi ion MOSFETs simulation with density gradient model 279
Modeling and simulation of combined thermionic emission-tunneling current through interfacial isolation layer 283
Experiments on minority carrier diffusion in silicon : contribution of excitons 287
Accurate temperature drift model of MOSFETs mobility for analog circuits 291
Accurate modeling of lattice site-dependent ionization level of impurities in [alpha]-SiC devices 295
Strain scaling for ultra thin silicon NMOS devices 299
CMOS scaling analysis based on ITRS roadmap by three-dimensional mixed-mode device simulation 303
Comparison of nanoscale metal-oxide-semiconductor field effect transistors 307
Numerical analysis for the structure dependence on the subthreshold slope of floating channel type SGT(FC-SGT) flash memory 311
A Monte-Carlo method for distribution of standby currents and its application to DRAM retention time 315
Optimal contact placement in partially depleted SOI with application to raised source-drain structures 319
Simulation of microstructure formation during thin film deposition 323
Effect of stress on pattern-dependent oxidation of silicon nanostructures 327
The evolution of the resistance and current density during electromigration 331
3-D physically-based electromigration simulation in copper-low-K interconnect 335
3D feature-scale simulation of sputter etching with coupling to equipment simulation 339
Automatic optimization algorithm for a direct 2D and 3D mesh generation from the layout information 343
Genetic algorithm for optimization and calibration in process simulation 347
Performance evaluation of linear solvers employed for semiconductor device simulation 351
An analysis of the effect of surrounding gate structure on soft error immunity 355
Analytical modeling of Ge and Si double-gated (DG) NFETs and the effect of process induced variations (PIV) on device performance 359
Proposal of physics-based compact model for nanoscale MOSFETs including the transition from drift-diffusion to ballistic transport 363
A new methodology for efficient and reliable large-signal analysis of RF power devices 367
Small-signal modeling of RF CMOS 374


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Simulation of Semiconductor Processes and Devices 2004, This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004.
The conference program included 7 invited ple, Simulation of Semiconductor Processes and Devices 2004

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Simulation of Semiconductor Processes and Devices 2004, This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004.
The conference program included 7 invited ple, Simulation of Semiconductor Processes and Devices 2004

Simulation of Semiconductor Processes and Devices 2004

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Simulation of Semiconductor Processes and Devices 2004, This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004.
The conference program included 7 invited ple, Simulation of Semiconductor Processes and Devices 2004

Simulation of Semiconductor Processes and Devices 2004

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