Reliability of RoHS-Compliant 2D and 3D IC Interconnects Book

Brief TOCCh 1. Introduction to RoHS Compliant Semiconductor and Packaging TechnologiesCh 2. Reliability Engineering of Lead-Free InterconnectsCh 3. Notes on Failure CriterionCh 4. Reliability of 1657-Pin CCGA Lead-Free Solder JointsCh 5. Reliability of PBGA (w/o Underfils) Lead-Free Solder JointsCh 6. Reliability of LED Lead-Free InterconnectsCh 7. Reliability of VCSEL Lead-Free InterconnectsCh 8. Reliability of Low-Temperature Lead-Free (SnBiAg) Solder JointsCh 9. Reliability of Lead-Free (SACX) Solder JointsCh 10. Chip-to-Wafer (C2W) Lead-Free Interconnect ReliabilityCh 11. Wafer-to-Wafer (W2W) Lead-Free Interconnect ReliabilityCh 12. Through-Silicon-Via (TSV) Interposer Lead-Free Interconnect ReliabilityCh 13. Electromigration of Lead-Free Microbumps for 3D IC IntegrationsCh 14. Effects of Dwell-Time and Ramp-Rates on SAC Thermal Cycling Test ResultsCh 15. Effects of High Strain Rate (Impact) on SAC Solder BumpsCh 16. Effects of Voids on Solder Joints Reliability

John H. Lau, Ph.D., P.E., IEEE Fellow, ASME Fellow, ITRI Fellow, spent 25 years in the electronics industry in Palo Alto, California, and currently serves as fellow at the Electronics & Optoelectronics Laboratories, Industrial Technology Research Institute (ITRI), Taiwan. He has published 15 books with McGraw-Hill, including Advanced MEMS Packaging and Electronics Manufacturing.