Modeling Of Electrical Overstress In Integrated Circuits Book

Modeling Of Electrical Overstress In Integrated Circuits, Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrica, Modeling Of Electrical Overstress In Integrated Circuits

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Modeling Of Electrical Overstress In Integrated Circuits
Written by author Carlos H. Diaz
Published by Springer-Verlag New York, LLC, November 1994
Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrica
Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrica

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Book Categories

Authors

List of Figures
List of Tables
Preface
Acknowledgements
1 Electrical Overstress in ICS 1
2 NMOS ESD Protection Devices and Process Related Issues 11
3 Measuring EOS Robustness in ICS 25
4 EOS Thermal Failure Simulation for Integrated Circuits 43
5 ITSIM: A Nonlinear 2D - 1D Thermal Simulator 63
6 2D Electrothermal Analysis of Device Failure in MOS Processes 73
7 Circuit-Level Electrothermal Simulation 85
8 IETSIM: An Electrothermal Circuit Simulator 111
9 Summary and Future Research 129
Bibliography 133
Index 143
About the Authors 147

Title: Modeling Of Electrical Overstress In Integrated Circuits

Manufacturer:

Steidl Publishing

Item Number: 9780792395058

Publication Date: November 1994

Number: 1

Product Description: Modeling Of Electrical Overstress In Integrated Circuits

Universal Product Code (UPC): 9780792395058

WonderClub Stock Keeping Unit (WSKU): 9780792395058

Rating: 4/5 based on 2 Reviews

Image Location: https://wonderclub.com/images/covers/50/58/9780792395058.jpg

Category: Media >> Books

Weight: 0.200 kg (0.44 lbs)

Width: 9.210 cm (3.63 inches)

Heigh : 6.140 cm (2.42 inches)

Depth: 0.500 cm (0.20 inches)

Date Added: August 25, 2020, Added By: Ross

Date Last Edited: August 25, 2020, Edited By: Ross

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Modeling Of Electrical Overstress In Integrated Circuits, Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrica, Modeling Of Electrical Overstress In Integrated Circuits

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Add Modeling Of Electrical Overstress In Integrated Circuits, Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrica, Modeling Of Electrical Overstress In Integrated Circuits to your collection on WonderClub

Modeling Of Electrical Overstress In Integrated Circuits Book

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	List of Figures
	List of Tables
	Preface
	Acknowledgements
1	Electrical Overstress in ICS	1
2	NMOS ESD Protection Devices and Process Related Issues	11
3	Measuring EOS Robustness in ICS	25
4	EOS Thermal Failure Simulation for Integrated Circuits	43
5	ITSIM: A Nonlinear 2D - 1D Thermal Simulator	63
6	2D Electrothermal Analysis of Device Failure in MOS Processes	73
7	Circuit-Level Electrothermal Simulation	85
8	IETSIM: An Electrothermal Circuit Simulator	111
9	Summary and Future Research	129
	Bibliography	133
	Index	143
	About the Authors	147