Advances in Computer Systems Architecture Book

	Some real observations on virtual machines	1
	Replica victim caching to improve reliability of in-cache replication	2
	Efficient victim mechanism on sector cache organization	16
	Cache behavior analysis of a compiler-assisted cache replacement policy	30
	Modeling the cache behavior of codes with arbitrary data-dependent conditional structures	44
	A configurable system-on-chip architecture for embedded devices	58
	An auto-adaptative reconfigurable architecture for the control	72
	Enhancing the memory performance of embedded systems with the flexible sequential and random access memory	88
	Heuristic algorithm for reducing mapping sets of hardware-software partitioning in reconfigurable system	102
	Architecture design of a high-performance 32-bit fixed-point DSP	115
	TengYue-1 : a high performance embedded SoC	126
	A fault-tolerant single-chip multiprocessor	137
	Initial experiences with dreamy memory and the RAMpage memory hierarchy	146
	dDVS : an efficient dynamic voltage scaling algorithm based on the differential of CPU utilization	160
	High performance microprocessor design methods exploiting information locality and data redundancy for lower area cost and power consumption	170
	Dynamic reallocation of functional units in superscalar processors	185
	Multiple-dimension scalable adaptive stream architecture	199
	Impact of register-cache bandwidth variation on processor performance	212
	Exploiting free execution slots on EPIC processors for efficient and accurate runtime profiling	226
	Continuous adaptive object-code re-optimization framework	241
	Initial evaluation of a user-level device driver framework	256
	A generation ahead of microprocessor : where software can drive uArchitecture to?	270
	A cost-effective supersampling for full scene AntiAliasing	271
	A simple architectural enhancement for fast and flexible elliptic curve cryptography over binary finite fields GF(2[superscript m])	282
	Scalable design framework for JPEG2000 system architecture	296
	Real-time three dimensional vision	309
	A router architecture for QoS capable clusters	321
	Optimal scheduling algorithms in WDM optical interconnects with limited range wavelength conversion capability	335
	Comparative evaluation of adaptive and deterministic routing in the OTIS-hypercube	349
	A two-level on-chip bus system based on multiplexers	363
	Make computers cheaper and simpler	373
	A low power branch predictor to selectively access the BTB	374
	Static techniques to improve power efficiency of branch predictors	385
	Choice predictor for free	399
	Performance impact of different data value predictors	414
	Heterogeneous networks of workstations	426
	Finding high performance solution in reconfigurable mesh-connected VLSI arrays	440
	Order independent transparency for image composition parallel rendering machines	449
	An authorization architecture oriented to engineering and scientific computation in grid environments	461
	Validating word-oriented processors for bit and multi-word operations	473
	Dynamic fetch engine for simultaneous multithreaded processors	489
	A novel rename register architecture and performance analysis	503
	A new hierarchy cache scheme using RAM and Pagefile	515
	An object-oriented data storage system on network-attached object devices	527
	A scalable and adaptive directory scheme for hardware distributed shared memory	539
	A compiler-assisted on-chip assigned-signature control flow checking	554
	A floating point divider performing IEEE rounding and quotient conversion in parallel	568
	Efficient buffer allocation for asynchronous linear pipelines by design space localization	582