VLSI-SoC: Advanced Topics on Systems on a Chip: A Selection of Extended Versions of the Best Papers of the Fourteenth International Conference on Very Large Scale Integration of Sy Book

Contents v

Preface vii

Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies Gustavo Neuberger Fernanda Kastensmidt Ricardo Reis Gilson Wirth Ralf Brederlow Christian Pacha 1

Use of Gray Decoding for Implementation of Symmetric Functions Osnat Keren Ilya Levin Radomir Stankovic 17

A Programmable Multi-Dimensional Analog Radial-Basis-Function-Based Classifier Sheng-Yu Peng Paul Hasler David Anderson 33

Compression-based SoC Test Infrastructures Julien Dalmasso Marie-Lise Flottes Bruno Rouzeyre 53

Parametric Structure-Preserving Model Order Reduction Jorge Fernandez Villena Wil Schilders L. Miguel Silveira 69

ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching Marco Paolieri Ivano Bonesana Marco Domenico Santambrogio 89

QoS in Networks-on-Chip - Beyond Priority and Circuit Switching Techniques Aline Mello Ney Calazans Fernando Moraes 109

Regression Based Circuit Matrix Models for Accurate Performance Estimation of Analog Circuits Almitra Pradhan Ranga Vemuri 131

Statistical and Numerical Approach for a Computer Efficient Circuit Yield Analysis Lucas Brusamarello Roberto da Silva Gilson Ricardo Reis 151

Sword: A SAT like Prover Using World Level Information Robert Wille G&oumlet;rschwin Fey Daniel Groβe Stephan Eggersgl&uumlet;ss Rolf Drechsler 175

A New Analytical Approach of the Impact of Jitter on Continuous Time Delta Sigma Converters Julien Goulier Eric Andre Marc Renaudin 193

An Adaptive Genetic Algorithm for Dynamically Reconfigurable Modules Allocation Vincenzo Rana Chiara Sandionigi Marco Domenico Santambrogio Donatella Sciuto 209

TheHazard-Free Superscalar Pipeline Fast Fourier Transform Algorithm and Architecture Bassam Mohd Adnan Aziz Earl Sartzlander 227

System and Procesor Design Effort Estimation Cyrus Bazeghi Francisco Mesa-Martinez Jose Renau 249

Reconfigurable Acceleration with Binary Compatibility for General Purpose Processors Antonio Carlos Schneider Beck Luigi Carro 271

First Order, Quasi-Static, SOI Charge Conserving Power Dissipation Model Sameer Sharma Louis Johnson 287