Layout Optimization In Vlsi Design Book

Name: Layout Optimization In Vlsi Design, The exponential scaling of fe
Brand: Steidl Publishing
SKU: 9781402000898
Price: 168.22 USD
Availability: InStock
Rating: 3 (2 reviews)

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Layout Optimization In Vlsi Design, The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate t, Layout Optimization In Vlsi Design

3 out of 5 stars based on 2 reviews

Layout Optimization In Vlsi Design
Written by author Bing Lu
Published by Springer-Verlag New York, LLC, January 2001
The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate t
The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate t

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Preface
1 Integrated Floorplanning and Interconnect Planning 1
2 Interconnect Planning 19
3 Modern Standard-cell Placement Techniques 45
4 Non-Hanan Optimization for Global VLSI Interconnect 89
5 Techniques for Timing-Driven Routing 125
6 Interconnect Modeling and Design with Consideration of Inductance 155
7 Modeling and Characterization of IC Interconnects and Packagings for the Signal Intergrity Verification on High-Performance VLSI Circuits 191
8 Tradeoffs in Digital Binary Adder Design: the Effects of Floorplanning, Number of Levels of Metals, and Supply Voltage on Performance and Area 261

Title: Layout Optimization In Vlsi Design

Manufacturer:

Steidl Publishing

Item Number: 9781402000898

Publication Date: January 2001

Number: 1

Product Description: Layout Optimization In Vlsi Design

Universal Product Code (UPC): 9781402000898

WonderClub Stock Keeping Unit (WSKU): 9781402000898

Rating: 3/5 based on 2 Reviews

Image Location: https://wonderclub.com/images/covers/08/98/9781402000898.jpg

Category: Media >> Books

Weight: 0.200 kg (0.44 lbs)

Width: 0.750 cm (0.30 inches)

Heigh : 6.140 cm (2.42 inches)

Depth: 9.210 cm (3.63 inches)

Date Added: August 25, 2020, Added By: Ross

Date Last Edited: August 25, 2020, Edited By: Ross

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Layout Optimization In Vlsi Design, The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate t, Layout Optimization In Vlsi Design

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	Preface
1	Integrated Floorplanning and Interconnect Planning	1
2	Interconnect Planning	19
3	Modern Standard-cell Placement Techniques	45
4	Non-Hanan Optimization for Global VLSI Interconnect	89
5	Techniques for Timing-Driven Routing	125
6	Interconnect Modeling and Design with Consideration of Inductance	155
7	Modeling and Characterization of IC Interconnects and Packagings for the Signal Intergrity Verification on High-Performance VLSI Circuits	191
8	Tradeoffs in Digital Binary Adder Design: the Effects of Floorplanning, Number of Levels of Metals, and Supply Voltage on Performance and Area	261