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Book Categories |
| The Need for Formal Methods for Integrated Circuit Design | 1 | |
| Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking | 19 | |
| BMDs Can Delay the Use of Theorem Proving for Verifying Arithmetic Assembly Instructions | 34 | |
| Modular Verification of Multipliers | 49 | |
| Verification of IEEE Compliant Subtractive Division Algorithms | 64 | |
| Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study | 79 | |
| Experiments in Automating Hardware Verification Using Inductive Proof Planning | 94 | |
| Verifying Nondeterministic Implementations of Deterministic Systems | 109 | |
| A Methodology for Processor Implementation Verification | 126 | |
| Coverage-Directed Test Generation Using Symbolic Techniques | 143 | |
| Self-Consistency Checking | 159 | |
| Inverting the Abstraction Mapping: A Methodology for Hardware Verification | 172 | |
| Validity Checking of Combinations of Theories with Equality | 187 | |
| A Unified Approach for Combining Different Formalisms for Hardware Verification | 202 | |
| Verification Using Uninterpreted Functions and Finite Instantiations | 218 | |
| Formal Verification of the Island Tunnel Controller Using Multiway Decisions Graphs | 233 | |
| VIS | 248 | |
| PVS: Combining Specification, Proof Checking, and Model Checking | 257 | |
| HOL Light: A Tutorial Introduction | 265 | |
| A Tutorial on Digital Design Derivation Using DRS | 270 | |
| ACL2 Theorems about Commercial Microprocessors | 275 | |
| Formal Synthesis in Circuit Design - A Classification and Survey | 294 | |
| Formal Specification and Verification of VHDL | 310 | |
| Specification of Control Flow Properties for Verification of Synthesized VHDL Designs | 327 | |
| An Algebraic Model of Correctness for Superscalar Microprocessors | 346 | |
| Mechanically Checking a Lemma Used in an Automatic Verification Tool | 362 | |
| Automatic Generation of Invariants in Processor Verification | 377 | |
| A Brief Study of BDD Package Performance | 389 | |
| Local Encoding Transformations for Optimizing OBDD-Representations of Finite State Machines | 404 | |
| Decomposition Techniques for Efficient ROBDD Construction | 419 | |
| BDDs vs. Zero-Suppressed BDDs : For CTL Symbolic Model Checking of Petri Nets | 435 | |
| HDL-Based Integration of Formal Methods and CAD Tools in the Prevail Environment | 450 | |
| List of Authors | 469 |
| Price | Condition | Delivery | Seller | Action |
| $99.99 | Digital |
| WonderClub |
David Flaugher
reviewed Formal Methods in Computer-Aided Design, Vol. 116 on March 23, 2018
Formal Methods in Computer-Aided Design, Vol. 116
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Add Formal Methods in Computer-Aided Design, Vol. 116, This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a, Formal Methods in Computer-Aided Design, Vol. 116 to the inventory that you are selling on WonderClubX
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Add Formal Methods in Computer-Aided Design, Vol. 116, This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a, Formal Methods in Computer-Aided Design, Vol. 116 to your collection on WonderClub |