Oversampled Delta-SIGMA Modulators: Analysis, Applications and Novel Topologies Book

Preface. 1: Introduction. 1.1. Aims and Motivations. 1.2. Original Contributions. 1.3. Outline of the Research Monograph. 2: Basic Principles of Delta-Sigma Modulation. 2.1. Nyquist Rate Converters. 2.2. Quantization Noise. 2.3. Oversampling Advantage. 2.4. DeltaSigma Modulation. 2.5. Limit Cycle Oscillations and Tones. 2.6. Higher Order DeltaSigma Modulators. 2.7. Multi-Bit DeltaSigma Converters. 2.8. State-of-the-art Analysis. 3: Analysis of Mash Delta-Sigma Modulators with DC Inputs. 3.1. Introduction. 3.2. Non-Linear Difference Equations. 3.3. Statistics of the Quantizer Error Sequence. 3.4. Simulation Results. 3.5. Output Spectrum. 3.6. Digital Realization of Irrational Initial Condition. 3.7. Conclusion. 4: Analysis of Single-Stage Delta-Sigma Modulators with DC Inputs. 4.1. Motivation behind the Work. 4.2. Uniform Quantizer in the No-Overload Region. 4.3. Non-Linear Difference Equations. 4.4. No-Overload Stability Criterion. 4.5. Solution to the Non-Linear Difference Equation. 4.6. Statistics of the Quantizer Error Sequence. 4.7. Fundamental Result. 4.8. Simulation Results. 4.9. Output Spectrum. 4.10. Error-Feedback Topology. 4.11. Conclusion. 5: Fractional-N PLL Frequency Synthesizers. 5.1. Introduction. 5.2. Analysis of PLLs. 5.3. The Fractional-N Concept. 5.4. Design and Simulation of Fractional-N PLL Frequency Synthesizers. 5.5. Pipelined Implementation of Mash ΔΣ Modulators. 5.6. Conclusion. 6: Time-Interleaved Delta-Sigma Modulators. 6.1. Introduction. 6.2. Block Digital Filtering Approach. 6.3. Time-Interleaved ΔΣ Modulators with Reduced Complexity. 6.4. Simulations. 6.5. Implementation Issues. 6.6. Hardware Comparison. 6.7. Higher-Order Time-Interleaved ΔΣ Modulators. 6.8. Zero-Insertion Interpolation Time-Interleaving. 6.9. Further Practical Issues. 6.10. Conclusion. References.