Computer-Aided Design Techniques for Low Power Sequential Logic Circuits Book

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits, Rapid increases in chip complexity, increasingly faster clocks, and the proliferation of portable devices have combined to make power dissipation an important design parameter. The power consumption of a digital system determines its heat dissipation as w, Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

3 out of 5 stars based on 2 reviews

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits
Written by author Jos Monteiro
Published by Springer-Verlag New York, LLC, June 2008
Rapid increases in chip complexity, increasingly faster clocks, and the proliferation of portable devices have combined to make power dissipation an important design parameter. The power consumption of a digital system determines its heat dissipation as w
Rapid increases in chip complexity, increasingly faster clocks, and the proliferation of portable devices have combined to make power dissipation an important design parameter. The power consumption of a digital system determines its heat dissipation as w

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Book Categories

Authors

List of Figures
List of Tables
Preface
Acknowledgments
1 Introduction 1
2 Power Estimation 9
3 A Power Estimation Method for Combinational Circuits 23
4 Power Estimation for Sequential Circuits 35
5 Optimization Techniques for Low Power Circuits 81
6 Retiming for Low Power 97
7 Precomputation 111
8 High-Level Power Estimation and Optimization 151
9 Conclusion 173

Title: Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

Manufacturer:

Steidl Publishing

Item Number: 9780792398295

Publication Date: June 2008

Number: 1

Product Description: Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

Universal Product Code (UPC): 9780792398295

WonderClub Stock Keeping Unit (WSKU): 9780792398295

Rating: 3/5 based on 2 Reviews

Image Location: https://wonderclub.com/images/covers/82/95/9780792398295.jpg

Category: Media >> Books

Weight: 0.200 kg (0.44 lbs)

Width: 9.210 cm (3.63 inches)

Heigh : 6.140 cm (2.42 inches)

Depth: 0.500 cm (0.20 inches)

Date Added: August 25, 2020, Added By: Ross

Date Last Edited: August 25, 2020, Edited By: Ross

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dino gomez

reviewed Computer-Aided Design Techniques for Low Power Sequential Logic Circuits on April 28, 2018

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

Very interesting, although I don't think it dived as deeply into practical implementation of its ideas.

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Computer-Aided Design Techniques for Low Power Sequential Logic Circuits, Rapid increases in chip complexity, increasingly faster clocks, and the proliferation of portable devices have combined to make power dissipation an important design parameter. The power consumption of a digital system determines its heat dissipation as w, Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

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Computer-Aided Design Techniques for Low Power Sequential Logic Circuits Book

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Steidl Publishing

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	List of Figures
	List of Tables
	Preface
	Acknowledgments
1	Introduction	1
2	Power Estimation	9
3	A Power Estimation Method for Combinational Circuits	23
4	Power Estimation for Sequential Circuits	35
5	Optimization Techniques for Low Power Circuits	81
6	Retiming for Low Power	97
7	Precomputation	111
8	High-Level Power Estimation and Optimization	151
9	Conclusion	173