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Foreword | ||
Preface | ||
Ch. 1 | Two-Level Logic Minimization | 1 |
Ch. 2 | Multi-Level Logic Optimization | 29 |
Ch. 3 | Flexibility in Logic | 65 |
Ch. 4 | Multiple-Valued Logic Synthesis and Optimization | 89 |
Ch. 5 | Technology Mapping | 115 |
Ch. 6 | Technology-based Transformations | 141 |
Ch. 7 | Logical and Physical Design: A flow Perspective | 167 |
Ch. 8 | Logic Synthesis for Low Power | 197 |
Ch. 9 | Optimization of Synchronous Circuits | 225 |
Ch. 10 | Asynchronous Control Circuits | 255 |
Ch. 11 | Ordered Binary Decision Diagrams | 285 |
Ch. 12 | SAT and ATPG: Algorithms for Boolean Decision Problems | 309 |
Ch. 13 | Combinational and Sequential Equivalence Checking | 343 |
Ch. 14 | Static Timing Analysis | 373 |
Ch. 15 | The Future of Logic Synthesis and Verification | 403 |
App. A: About the Authors | 435 | |
App. B: Author Contact Information | 443 | |
Index | 447 |
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Add Logic Synthesis And Verification, Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's pleth, Logic Synthesis And Verification to the inventory that you are selling on WonderClubX
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Add Logic Synthesis And Verification, Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's pleth, Logic Synthesis And Verification to your collection on WonderClub |