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| Continuous trip count profiling for loop optimizations in two-phase dynamic binary translators | 3 | |
| Exploitation of instruction-level parallelism for optimal loop scheduling | 13 | |
| Garbage collector refinement for new dynamic multimedia applications on embedded systems | 25 | |
| Dynamic management of nursery space organization in generational collection | 33 | |
| Cool-fetch : a compiler-enabled IPC estimation based framework for energy reduction | 43 | |
| Energy-efficiency potential of a phase-based cache resizing scheme for embedded systems | 53 | |
| SimSnap : fast-forwarding via native execution and application-level checkpointing | 65 | |
| Exploiting procedure level locality to reduce instruction cache misses | 75 | |
| Link-time optimization techniques for eliminating conditional branch redundancies | 87 | |
| Reducing fetch architecture complexity using procedure inlining | 97 | |
| Fast indexing for blocked array layouts to improve multi-level cache locality | 109 | |
| Data movement optimization for software-controlled on-chip memory | 120 |
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Edward Mantyla
reviewed Proceedings of The Eighth Workshop on Interaction Between Compilers and Computer Architectures: INTERACT 2004 115 February 2004, Madrid, Spain on January 06, 2014
Proceedings of The Eighth Workshop on Interaction Between Compilers and Computer Architectures: INTERACT 2004 115 February 2004, Madrid, Spain
Ok, a bit outdated.
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