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Ch. 1 Introduction Charles E. Stroud Stroud, Charles E. Lang-Terng Wang Wang, Lang-Terng Yao-Wen Chang Chang, Yao-Wen 1
Ch. 2 Fundamentals of CMOS design Xinghao Chen Chen, Xinghao Nur A. Touba Touba, Nur A. 39
Ch. 3 Design for testability Laung-Terng Wang Wang, Laung-Terng 97
Ch. 4 Fundamentals of algorithms Chung-Yang Huang Huang, Chung-Yang Chao-Yue Lai Lai, Chao-Yue Kwang-Ting Cheng Cheng, Kwang-Ting 173
Ch. 5 Electronic system-level design and high-level synthesis Jianwen Zhu Zhu, Jianwen Nikil Dutt Dutt, Nikil 235
Ch. 6 Logic synthesis in a nutshell Jie-Hong Jiang Jiang, Jie-Hong Srinivas Devadas Devadas, Srinivas 299
Ch. 7 Test synthesis Laung-Terng Wang Wang, Laung-Terng Xiaoqing Wen Wen, Xiaoqing Shianling Wu Wu, Shianling 405
Ch. 8 Logic and circuit simulation Jiun-Lang Huang Huang, Jiun-Lang Cheng-Kok Koh Koh, Cheng-Kok Stephen F. Cauley Cauley, Stephen F. 449
Ch. 9 Functional verification Hung-Pin Wen Wen, Hung-Pin Li-C. Wang Wang, Li-C. Kwang-Ting Cheng Cheng, Kwang-Ting 513
Ch. 10 Floorplanning Tung-Chieh Chen Chen, Tung-Chieh Yao-Wen Chang Chang, Yao-Wen 575
Ch. 11 Placement Chris Chu Chu, Chris 635
Ch. 12 Global and detailed routing Huang-Yu Chen Chen, Huang-Yu Yao-Wen Chang Chang, Yao-Wen 687
Ch. 13 Synthesis of clock ad power/ground networks Cheng-Kok Koh Koh, Cheng-Kok Jitesh Jain Jain, Jitesh Stephen F. Cauley Cauley, Stephen F. 751
Ch. 14 Fault Simulation and Test Generation James C.-M. Li Li, James C.-M. Michael S. Hsiao Hsiao, Michael S. 851
Index 919
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