Electronic Design Automation: Synthesis, Verification, and Test Book

Contents

Preface....................xxi
In the Classroom....................xxv
Acknowledgments....................xxvii
Contributors....................xxix
About the Editors....................xxxiii
CHAPTER 1 Introduction Charles E. Stroud, Lang-Terng (L.-T.) Wang, and Yao-Wen Chang....................1
CHAPTER 2 Fundamentals of CMOS design Xinghao Chen and Nur A. Touba....................39
CHAPTER 3 Design for testability Laung-Terng (L.-T.) Wang....................97
CHAPTER 4 Fundamentals of algorithms Chung-Yang (Ric) Huang, Chao-Yue Lai, and Kwang-Ting (Tim) Cheng....................173
CHAPTER 5 Electronic system-level design and high-level synthesis Jianwen Zhu and Nikil Dutt....................235
CHAPTER 6 Logic synthesis in a nutshell Jie-Hong (Roland) Jiang and Srinivas Devadas....................299
CHAPTER 7 Test synthesis Laung-Terng (L.-T.) Wang, Xiaoqing Wen, and Shianling Wu....................405
CHAPTER 8 Logic and circuit simulation Jiun-Lang Huang, Cheng-Kok Koh, and Stephen F. Cauley....................449
CHAPTER 9 Functional verification Hung-Pin (Charles) Wen, Li-C. Wang, and Kwang-Ting (Tim) Cheng....................513
CHAPTER 10 Floorplanning Tung-Chieh Chen and Yao-Wen Chang....................575
CHAPTER 11 Placement Chris Chu....................635
CHAPTER 12 Global and detailed routing Huang-Yu Chen and Yao-Wen Chang....................687
CHAPTER 13 Synthesis of clock and power/ground networks Cheng-Kok Koh, Jitesh Jain, and Stephen F. Cauley....................751
CHAPTER 14 Fault Simulation and Test Generation James C.-M. Li and Michael S. Hsiao....................851
Index....................919